Maria Celeste García PHD Graduation

December 4, 2019 (4y ago)


Celeste's MASc Thesis Defense and Achievements

In early December, Celeste successfully defended her MASc thesis to conclude her program and continue with us pursuing her PhD.

Achievements

Celeste’s great achievements include but are not limited to the following:

  • 3 IEEE International Conferences Publications (1 as the first author)
  • Collaboration with other lab members in 1 IEEE Journal Publication (submitted)
  • Contributions in collaboration with Alpha Technologies Ltd. on PFC power losses estimation, design, and optimization

We congratulate Celeste for achieving this significant milestone in her career and wish her success in her PhD program!


Abstract for Celeste’s MASc Thesis

Title:
“Accurate Power Loss Models of Complex Converters”

Abstract:
Power loss estimation is essential for the design and optimization of power converters. Traditionally, the power loss estimation is done using datasheet-level information about the switching devices. However, this information is limited to isolated operating points, compromising the accuracy of the estimation.

In addition, the representation of PCB effects and gate driver, which cannot be considered by using datasheet parameters, increase the complexity of the tasks by adding more unknown magnitudes and more complex equations without guaranteeing their correct estimation.

In this work, a novel power loss estimation method, which can be applied to any topology, is presented. This proposed method utilizes Design of Experiments (DoE) and Response Surface Methodology (RSM) to model the different types of losses in all the elements in a power converter, such as power switches, diodes, and inductors.

With RSM, simple equations explain the different types of losses as a function of variables that directly affect them, allowing the losses estimation under any operating condition accurately. These models are extensively validated to show the advantage of using the proposed method, and significant improvement with respect to datasheet calculations is obtained.

For complex topologies such as Power Factor Corrector (PFC), accurate power loss estimation is not only necessary but also a challenge. To show the capabilities of the proposed model, it is applied to Universal PFC, which is a complicated converter in terms of loss calculation and analysis.

By using the proposed models:

  • The inductor is designed optimally
  • The optimal switching frequency is selected to minimize losses across different input voltage levels

Experimental Validation:
The proposed method yields a power loss reduction of up to 40%, with the greatest improvement at an input voltage of 110 V and an output power higher than 500 W.